An interleaved converter is disclosed in, for example, Japanese Patent Application Publication Nos. Sho 62-58871 and Sho 63-186555 as well as Japanese Patent No. 3570113. The interleaved converter is an electric power conversion device in which multiple converters are connected in parallel and are phase-shifted from one another to reduce current ripples of the current inputted to the converter and the current to be outputted from the converter. In addition, a phase controller for an interleaved converter is disclosed in Japanese Patent Nos. 3570113 and 3480201.
FIG. 1 is a circuit configuration diagram showing a conventional interleaved converter using two circuits of boost converters.
In FIG. 1, a first series circuit, which includes a boost reactor L1, a switching element Q1 made of a MOSFET, and a switching current detector CT1, is connected to the terminals of an input power source Vin formed of a DC power source. The anode of a rectifier D1 is connected to a connection point of the reactor L1 and the switching element Q1 while the cathode of the rectifier D1 is grounded through a smoothing capacitor Co.
A second series circuit, which includes a boost reactor L2, a switching element Q2 made of a MOSFET, and a switching current detector CT2, is connected to the terminals of the input power source Vin. The anode of a rectifier D2 is connected to a connection point of the boost reactor L2 and the switching element Q2 while the cathode of the rectifier D2 is grounded through the smoothing capacitor Co.
A voltage detector 20 is configured to receive an output voltage Vo outputted from the terminals of the smoothing capacitor Co, and output an output voltage signal VFB. A first control circuit 21 is configured to generate an output signal Vdr1 based on an output from the switching current detector CT1 and the output voltage signal VFB, and thereby perform on/off control of the gate of the switching element Q1 by using the output signal Vdr1. A charge/discharge device 23 is configured to receive the output signal Vdr1 from the first control circuit 21. A phase control capacitor C21 is connected to one of output terminals of the charge/discharge device 23 and a phase control capacitor C22 is connected to the other one of the output terminals of the charge/discharge device 23.
A second control circuit 22 is configured to generate an output signal Vdr2 based on an output Vi2 from the switching current detector CT2, the output voltage signal VFB, as well as outputs Vc1 and Vc2 of the phase control capacitors C21 and C22, and thereby perform on/off control of the gate of the switching element Q2 by using the output signal Vdr2.
The boost reactor L1, the switching element Q1, the switching current detector CT1, the rectifier D1, and the first control circuit 21 form a first converter. The boost reactor L2, the switching element Q2, the switching current detector CT2, the rectifier D2, and the second control circuit 22 form a second converter. The first converter and the second converter are connected to each other at the respective input terminals as well as at the respective output terminals, thereby forming a boost interleaved converter.
The boost converter is configured to output an output voltage Vo that is higher than an input voltage Vin in accordance with the ON/OFF operations of the switching elements Q1 and Q2. When the switching element Q1 (or Q2) is ON, current flows from Vin, through L1 (or L2) and then Q1 (or Q2), to Vin, so that an energy of the magnetic flux is accumulated in the boost reactor L1 (or L2). When the switching element Q1 (or Q2) is OFF, current flows from Vin through L1 (or L2), D1 (or D2), and Co, to Vin, so that the energy of the magnetic flux in the boost reactor L1 (or L2), which is accumulated during the ON time of the switching element Q1 (or Q2), is discharged. This operation is expressed by the following expression:
                              Δ          ⁢                                          ⁢          IL                =                                                                        Vin                L                            ·              Ton                                            ≤                                                                                                        Vo                    +                    VF                    -                    Vin                                    L                                ·                Toff                                                    .                                              Λ        ⁡                  (          1          )                    
In the expression (1), ΔIL represents an amount of change in current flowing through the boost reactor L1 (or L2), Vin the voltage across the input power source Vin, Vo the voltage across the smoothing capacitor Co, VF the forward drop voltage of the rectifier D1 (or D2), L the value of the inductance of the boost reactor L1 (or L2), Ton the ON time of the switching element Q1 (or Q2), and Toff the OFF time of the switching element Q1 (or Q2). The minimum value of the OFF time Toff of the switching element Q1 (or Q2) is obtained from the expression (2) using the input voltage Vin, the output voltage Vo, and the ON time Ton:
                    Toff        ≥                              Vin                          Vo              +              VF              -              Vin                                ·                      Ton            .                                              Λ        ⁡                  (          2          )                    
FIG. 2 is a chart showing the operation waveforms of components of the conventional interleaved converter. In FIG. 2, Vdr1 represents the drive signal of the switching element Q1, Vc21 and Vc22 the voltages across the phase control capacitors C21 and C22, respectively, Vdr2 the drive signal of the switching element Q2, Vi1 the output signal of the switching current detector CT1, Vi2 the output signal of the switching current detector CT2, Ii1 the current flowing through the reactor L1, Ii2 the current flowing through the reactor L2, Ii the input current of the interleaved converter, Id1 the current flowing through the rectifier D1, Id2 the current flowing through the rectifier D2, and Io the output current of the interleaved converter.
The first converter outputs the drive signal Vdr1 for driving the switching element Q1, based on the output signal VFB of the voltage detector 20 and the output signal Vi1 of the switching current detector CT1, thereby converting the voltage from the input voltage Vin to the output voltage Vo. When the switching element Q1 is turned ON, the input voltage Vin is applied to the boost reactor L1, so that an energy of the magnetic flux is accumulated in the boost reactor L1. When the switching element Q1 is turned OFF, the energy of the magnetic flux accumulated in the boost reactor L1 is charged to the smoothing capacitor Co through the rectifier D1.
In this manner, the first converter performs the power conversion through the path from the input power source Vin to the smoothing capacitor Co by use of the ON/OFF operations of the switching element Q1. In the same manner, the second converter performs the power conversion through the path from the input power source Vin to the smoothing capacitor Co by use of the ON/OFF operations of the switching element Q2. Operating the first converter and the second converter respectively with mutually different phases suppresses the ripple of the current flowing through the input power source Vin and the smoothing capacitor Co. The suppressing effect is proportional to the number of converters connected in parallel with a constant phase difference between each two of the converters.
In the conventional example shown in FIG. 1, the charge/discharge device 23 is provided to appropriately control the phase of each converter. The charge/discharge device 23 is configured to perform the charging and discharging of the phase control capacitors C21 and C22 in synchronization with the drive signal Vdr1 of the switching element Q1. When the phase control capacitor C21 is charged, the phase control capacitor C22 is discharged. When the phase control capacitor C21 is discharged, the phase control capacitor C22 is charged. The voltages Vc21 and Vc22 respectively across the phase control capacitors C21 and C22 form triangular waves having phases mutually shifted by 180 degrees. From the comparison of signals of the two triangular waves having phases mutually shifted, it is found that the values of the voltages Vc21 and Vc22 cross each other at the middle of each cycle of the drive signal Vdr1 of the switching element Q1. The second control circuit 22 compares the inputted voltages Vc21 and Vc22 respectively across the phase control capacitors C21 and C22 with each other, thereby detecting a time point at which the voltages Vc21 and Vc22 cross each other, and outputs the drive signal Vdr2 to the switching element Q2 at the detected time point. With such a configuration, the second converter is given a voltage with a phase which is different by 180 degrees from that of the first converter.
However, in the interleaved converter configured as described above, the phase difference between the first and second converters varies due to a difference in capacity between the phase control capacitors C21 and C22. In addition, the interleaved converter requires phase control capacitors the number of which is equal to or larger than the number of converters connected in parallel. For this reason, an increase in the number of converters makes the circuit of the interleaved converter complicated.
An object of the present invention is thus to provide an inexpensive interleaved converter having a simplified circuit.